Integrated circuits (ICs) can be implemented to perform a variety of functions. Some ICs can be programmed to perform specified functions. One example of an IC that can be programmed is a field programmable gate array (FPGA). An FPGA typically includes an array of programmable tiles. These programmable tiles may include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), and so forth.
Each programmable tile typically includes both programmable interconnect circuitry and programmable logic circuitry. The programmable interconnect circuitry typically includes a large number of interconnect lines of varying lengths interconnected by programmable interconnect points (PIPs). The programmable logic circuitry implements the logic of a user design using programmable elements that may include, for example, function generators, registers, arithmetic logic, and so forth.
The programmable interconnect and programmable logic circuitries are typically programmed by loading a stream of configuration data into internal configuration memory cells that define how the programmable elements are configured. The configuration data can be read from memory (e.g., from an external PROM) or written into the FPGA by an external device. The collective states of the individual memory cells then determine the function of the FPGA.
Another type of programmable IC is the complex programmable logic device, or CPLD. A CPLD includes two or more “function blocks” connected together and to input/output (I/O) resources by an interconnect switch matrix. Each function block of the CPLD includes a two-level AND/OR structure similar to those used in programmable logic arrays (PLAs) and programmable array logic (PAL) devices. In CPLDs, configuration data is typically stored on-chip in non-volatile memory. In some CPLDs, configuration data is stored on-chip in non-volatile memory, then downloaded to volatile memory as part of an initial configuration (programming) sequence.
For all of these programmable ICs, the functionality of the device is controlled by data bits provided to the device for that purpose. The data bits may be stored in volatile memory (e.g., static memory cells, as in FPGAs and some CPLDs), in non-volatile memory (e.g., FLASH memory, as in some CPLDs), or in any other type of memory cell.
Other programmable ICs are programmed by applying a processing layer, such as a metal layer, that programmably interconnects the various elements on the device. These programmable ICs are known as mask programmable devices. Programmable ICs may also be implemented in other ways, e.g., using fuse or antifuse technology. The phrase “programmable IC” may include, but is not limited to, these devices and further may encompass devices that are only partially programmable. For example, one type of programmable IC includes a combination of hard-coded transistor logic and a programmable switch fabric that programmably interconnects the hard-coded transistor logic.
Within ICs, including the various programmable ICs noted above, a variety of different types of power dissipation contribute to overall power dissipation of the device. Dynamic power dissipation, static power dissipation, and clock power dissipation are all aspects or parts of overall power dissipation of a device. Dynamic power dissipation refers to the amount of power that is dissipated by nodes of a circuit or device as the output of the nodes transitions from one stable state to another stable state. Dynamic power dissipation (Pdyn) of a node may be calculated as Pdyn=CV2 f, where C is the capacitance of the node, V is the power supply voltage of the node, and f is the toggle (e.g., transition) rate of the node.
Vectorless dynamic power estimation refers to a particular technique for dynamic power analysis where the toggle rate of one or more nodes of the circuit is unknown. Given a known toggle rate as an input to an unknown node, however, a process called “propagation” may be used to determine the toggle rate for the node. The toggle rate of a node refers to the toggle, or transition, rate, of the output of the node. Propagation relies upon probabilities to estimate toggle rates for nodes of the circuit. Having estimated toggle rates for nodes of the circuit, the dynamic power dissipation of the circuit may be calculated as the sum of Pdyn for the nodes.
Available techniques for performing vectorless dynamic power estimation suffer from a variety disadvantages. For example, available vectorless dynamic power estimation techniques tend to be less accurate than vector-based dynamic power estimation techniques performed using simulation. Efforts to increase the accuracy of vectorless dynamic power estimation have increased the amount of computational resources, e.g., the amount of memory and/or amount of processor runtime, needed to unacceptably high levels.